1 standard ics dual 4-bit static shift register bu4015b / BU4015BF the bu4015b and BU4015BF are 4-stage static shift registers, each consisting of two circuits. the d flip-flops for each stage share a common reset input, enabling external asynchronous reset at any point. also, the flip-flops at each stage are triggered by the rising edge of the clock input. ??level reset input resets the contents of all stages to ?? regardless of the clock and data input, and sets data out- puts q0 to q3 to ?? features 1) low power dissipation. 2) wide range of operating power supply voltages. 3) high input impedance. 4) high fan-out. 5) direct drive of 2 l-ttl inputs and 1 ls-ttl input. block diagram 2 q 3b q 1a q 0a d a q 2b 3 4 5 6 reset a 7 8 15 14 13 12 11 10 9 v ss 1 clock b d b v dd q 0b q 1b q 2b q 3a reset b clock a 16 q 3 q 2 q 1 cl r d q 0 cl r d q 0 q 1 q 2 q 3 logic circuit diagram d q 0 q 1 q 2 q 3 clock reset dq cl q r dq cl q r dq cl q r dq cl q r truth table clock d reset q 0 q 1 q 2 q 3 ll lq 0 q 1 q 2 hl hq 0 q 1 q 2 x l no change xxh l l l l x : irrelevant
2 standard ics bu4015b / BU4015BF absolute maximum ratings (v ss = 0v, ta = 25?) parameter symbol limits unit power supply voltage v dd ? 0.3 ~ + 18 v power dissipation pd 1000 (dip), 500 (sop) mw operating temperature topr ? 40 ~ + 85 c storage temperature tstg ? 55 ~ + 150 c input voltage v in ? 0.3 ~ v dd + 0.3 v electrical characteristics dc characteristics (unless otherwise noted, ta = 25?, v ss = 0v) parameter symbol min. typ. max. unit conditions v dd (v) input high level voltage v ih 3.5 v 5 7.0 10 11.0 15 input low level voltage v il 1.5 v 5 3.0 10 4.0 15 input high level current i ih 0.3 m a15v ih = 15v input low level current i il ? 0.3 m a15v il = 0v output high level voltage v oh 4.95 v 5 i o = 0ma 9.95 10 14.95 15 output low level voltage v ol 0.05 v 5 i o = 0ma 0.05 10 0.05 15 output high level current i oh ? 0.16 ma 5v oh = 4.6v ? 0.4 10 v oh = 9.5v ? 1.2 15 v oh = 13.5v output low level current i ol 0.44 ma 5v ol = 0.4v 1.1 10 v ol = 0.5v 3.0 15 v ol = 1.5v static current dissipation i dd 20 m a 5 v i = v dd or gnd 40 10 80 15
3 standard ics bu4015b / BU4015BF switching characteristics (unless otherwise noted, ta = 25?, v ss = 0v, c l = 50pf) parameter symbol min. typ. max. unit conditions v dd (v) t tlh 180 ns 5 90 10 65 15 t thl 100 ns 5 50 10 40 15 propagation delay time, clock, d ? q t plh t phl 310 ns 5 125 10 90 15 propagation delay time, reset to q t plh t phl 460 ns 5 180 10 120 15 setup time t su 100 ns 5 50 10 40 15 minimum clock pulse width 185 ns 5 85 10 55 15 minimum reset pulse width 200 ns 5 80 10 60 15 maximum clock frequency 20 mhz 5 6.0 10 7.5 15 maximum clock rise time and fall time 100 m s 5 40 10 15 15 input capacitance c in 5 pf t wh (clk) t wh (r) f (clk) max. t r (clk) t f (clk) output rise time output fall time
4 standard ics bu4015b / BU4015BF measurement circuits q 3 q 2 q 1 cl r dq 0 p. g. 2 p. g. 1 c l v ss v dd c l c l c l fig.1 switching characteristics measurement circuit gnd clock reset d q 0 20ns 20ns t phl 20ns 20ns 20ns 50% 50% 90% 10% 10% 20ns t su t su t wh (r) t wh t wh t tlh t plh t thl 50% 90% 10% t phl fig.2 switching time measurement waveform electrical characterisistic curve power dissipation : pd (mw) 1200 1000 800 600 400 200 0 0 25 50 75 100 125 150 ambient temperature : ta ( c) sop16 dip16 fig.3 power dissipation vs. ambient temperature external dimensions (units: mm) sop16 bu4015b BU4015BF dip16 0.4 0.1 1.27 0.15 0.15 0.1 0.3min. 4.4 0.2 6.2 0.3 0.11 1.5 0.1 1 16 10.0 0.2 8 9 0.51min. 0.3 0.1 9 16 8 1 6.5 0.3 3.2 0.2 4.25 0.3 0.5 0.1 19.4 0.3 2.54 0 ~ 15 7.62
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